PBUS
1
PBUS
1
LDO3V
2
VINPP
LDO3V and LDO5V
VINVR3
Vin
power
ENVR3
VCCIO
(VR3)
EN
digital
Vout
LDO3V
LDO3V
2
LDO5V
LDO5V
3
FBVR3
V3.3A_DSW
PGVR3
V3.3A_DSW_PG
power
PG
digital
PCH
4
5
DPWROK 6
PGVR3(internal)
V3.3A_DSW
4
digital
VINVR2
Vin
power
DPWROK
1
PBUS
VINVR5
SUS_ON#
ENVR5
ENVR2
13
PBUS
V3.3APCH_PG
15
~ 95ms
delay
Vout
VCCPRIMCORE
(VR5) PG
EN
power
ENA
FBVR2
(V1.8A) V8
PGVR2
V1.8A_PG (V8)
FBVR5
VCCPRIMCORE
PGVR5
VCCPRIMCORE_PG
power
digital
PGE
`
V33APCH_EN
digital
`
VSA
PGA
`
V3.3APCH_PG
analog
1
VINVR1
Vin
power
ENVR1
EN
digital
V1.00A
(VR1)
Vout
FBVR1
SLP_ON#
7
8
(V1.00A) V11
SLP_SUS# 9
10
11
12
14
4 V3.3A_DSW
V33APCH
LS
13
12 V33APCH_EN
16
power
PGVR1
PG
V1.00A_PG (V11)
digital
RSMRST#_PWRGD
P_DPWROK
9
6
digital
digital
V33APCH
DPWROK
power
PG
Vin
digital
VCCPRIMCORE_PG
Vout
V1.8A
(VR2)
EN
digital
11
DPWROK
SLP_SUS#
6
9
10ms
rising
delay
DPWROK
17
18
RSMRST#
ENE
ENE
V3.3A_PCH(PGA)
22ms
rising
delay
V1.8A_PG(VR2)
RSMRSTZ_PWRGD
digital
V1.00A
V1.00A (PGVR1)
(PGVR1)
VPRIMCORE
VPRIMCORE (PGVR5)
(PGVR5)
all digital
SLP_S4# 191919
19
20
SLP_S4#
ENB
digital
V1.8U_2.5U
V1.8U_2.5U (V9)
(V9)
22
22
digital
PBUS
PGB
V1.8U_2.5U_EN
FBVR4
V1.2U(V10)
LS
V1.8U_2.5U
VINVR4
power
ENVR4
digital
21
digital
digital internal
Vin
4ms
turn-on
delay
EN
V1.2U
(VR4)
Vout
PG
power
PGVR4
V1.2U_PG
digital
``
23
24
SLP_S3# 25
25
SLP_S3#
SLP_S4#
PG_V1.8U_2.5U
VSB
analog
SLP_S4#
32ms
turn-off
delay
(V1.8A) V8
9
SLP_S3#
ENG
digital
16
En (ENG)
26
(V1.00A) V11
V1.00S
LS
25
VSG
PGG
V1.00S_PG
V1.00S_PG
27
analog
SLP_S3#/V1.00S_En
V3.3A_DSW
En (ENG)
26
V3.3S
SLP_S3# (V3.3S_En) LS
V3.3S_PG
VSE
internal
analog
25
(V1.8A) V8
26
V1.8S
SLP_S3# (V1.8S_En) LS
25
En (ENG)
V1.8S_PG
VSF
PGF
V1.8S_PG
analog
28
28
V3.3A_DSW
END
V1.2U_PG
`
27
analog
VCCIO
SLP_S3#
ENF
digital
VCCIO_EXT_EN
`
VSD
Ext_VCCIO
`
internal
SLP_S3#
Ext_VCCIO
RSMRST#_PWRGD
(before delay)
V1.0S_PG
V1.8S_PG
29
LS
PGD
digital
24
27
VCCIO
VCCPRIMCORE
V1.00S_PG
2ms
2.5ms
V3.3S_PG
ALL_SYS_PWRGD
30a
VCCST_PWRGD
30b
PCH_PWROK
31
PWRGDCNT1[4:3]
PWRGDCNT1[4:3]
V1.2U_PG
100ms
V1.8U_2.5U_PG
SYS_PWROK
32
PWRGDCNT1[2:0]
PWRGDCNT1[2:0]
all digital
all digital
35
23
33
35
V1.2U (V10)
DDR_VTT_CTRL
VINLDO1
power
Vin
SYS_PWROK
DDR_VTT_CTRL
EN
Vout
V0.6DX
(LDO1)
VOUTLDO1
power
PG
digital
SLP_S0#
SYS_PWROK
STANDBYZ
digital
DVS VCCPRIMCORE (VR5)
Decay VCCIO (VR3)
internal
V0.6DX (V13)
34
SLP_S0#
SLP_S0#
