R8C/14 Group, R8C/15 Group 16. A/D Converter A/D Conversion Rate Selection f1 CKS0=1 CKS1=1 ÏAD f2 CKS1=0 f4 CKS0=0 VCUT=0 AVSS VREF Resistor Ladder VCUT=1 Successive Conversion Register Software Trigger ADCAP=0 ADCON0 Trigger Timer Z Interrupt Request ADCAP=1 Vcom AD Register Decoder Comparator VIN Data Bus ADGSEL0=0 ADGSEL0=1 P1_0/AN8 P1_1/AN9 P1_2/AN10 P1_3/AN11 CH2 to CH0=100b CH2 to CH0=101b CH2 to CH0=110b CH2 to CH0=111b CH0 to CH2, CKS0 : Bits in ADCON0 register CKS1, VCUT: Bits in ADCON1 register Figure 16.1 Block Diagram of A/D Converter Rev.2.10 Jan 19, 2006 REJ09B0164-0210 Page 169 of 253